/* =========================================================================
 *  
 *  Copyright (c) 2019 Imagination Technologies Limited
 *  Copyright 2018-2022 NXP
 *
 *  SPDX-License-Identifier: GPL-2.0
 *
 * ========================================================================= */

#ifndef HW_S32G_PFE_L2BR_TABLE_CSR_H_
#define HW_S32G_PFE_L2BR_TABLE_CSR_H_

#ifndef PFE_CBUS_H_
#error Missing cbus.h
#endif /* PFE_CBUS_H_ */

#define MAC2F_TABLE_HASH_ENTRIES		256U /* Must be power-of-2 */
#define MAC2F_TABLE_COLL_ENTRIES		256U
#define MAC2F_TABLE_HASH_SPACE_START	0U
#define MAC2F_TABLE_COLL_SPACE_START	MAC2F_TABLE_HASH_ENTRIES

#define HOST_MAC2F_CMD_REG				(CLASS_DAMACHASH_HOST_CMD_REG)
#define HOST_MAC2F_MAC1_ADDR_REG		(CLASS_DAMACHASH_HOST_MAC_ADDR1_REG)
#define HOST_MAC2F_MAC2_ADDR_REG		(CLASS_DAMACHASH_HOST_MAC_ADDR2_REG)
#define HOST_MAC2F_MAC3_ADDR_REG		(CLASS_DAMACHASH_HOST_MAC_ADDR3_REG)
#define HOST_MAC2F_MAC4_ADDR_REG		(CLASS_DAMACHASH_HOST_MAC_ADDR4_REG)
#define HOST_MAC2F_MAC5_ADDR_REG		(CLASS_DAMACHASH_HOST_MAC_ADDR5_REG)
#define HOST_MAC2F_ENTRY_REG			(CLASS_DAMACHASH_HOST_ENTRY_REG)
#define HOST_MAC2F_STATUS_REG			(CLASS_DAMACHASH_HOST_STATUS_REG)
#define HOST_MAC2F_DIRECT_REG			(CLASS_DAMACHASH_HOST_DIRECT)

#define HOST_MAC2F_FREE_LIST_ENTRIES	(CLASS_DAMACHASH_FREELIST_ENTRIES)
#define HOST_MAC2F_FREE_LIST_HEAD_PTR	(CLASS_DAMACHASH_FREELIST_HEAD_PTR)
#define HOST_MAC2F_FREE_LIST_TAIL_PTR	(CLASS_DAMACHASH_FREELIST_TAIL_PTR)

#define VLAN_TABLE_HASH_ENTRIES		    64U /* Must be power-of-2 */
#define VLAN_TABLE_COLL_ENTRIES		    64U
#define VLAN_TABLE_HASH_SPACE_START	    0U
#define VLAN_TABLE_COLL_SPACE_START	    VLAN_TABLE_HASH_ENTRIES

#define HOST_VLAN_CMD_REG				(CLASS_DAVLANHASH_HOST_CMD_REG)
#define HOST_VLAN_MAC1_ADDR_REG			(CLASS_DAVLANHASH_HOST_MAC_ADDR1_REG)
#define HOST_VLAN_MAC2_ADDR_REG			(CLASS_DAVLANHASH_HOST_MAC_ADDR2_REG)
#define HOST_VLAN_MAC3_ADDR_REG			(CLASS_DAVLANHASH_HOST_MAC_ADDR3_REG)
#define HOST_VLAN_MAC4_ADDR_REG			(CLASS_DAVLANHASH_HOST_MAC_ADDR4_REG)
#define HOST_VLAN_MAC5_ADDR_REG			(CLASS_DAVLANHASH_HOST_MAC_ADDR5_REG)
#define HOST_VLAN_ENTRY_REG				(CLASS_DAVLANHASH_HOST_ENTRY_REG)
#define HOST_VLAN_STATUS_REG			(CLASS_DAVLANHASH_HOST_STATUS_REG)
#define HOST_VLAN_DIRECT_REG			(CLASS_DAVLANHASH_HOST_DIRECT)

#define HOST_VLAN_FREE_LIST_ENTRIES		(CLASS_DAVLANHASH_FREELIST_ENTRIES)
#define HOST_VLAN_FREE_LIST_HEAD_PTR	(CLASS_DAVLANHASH_FREELIST_HEAD_PTR)
#define HOST_VLAN_FREE_LIST_TAIL_PTR	(CLASS_DAVLANHASH_FREELIST_TAIL_PTR)

#define STATUS_REG_CMD_DONE				(1U << 0)
#define STATUS_REG_SIG_ENTRY_NOT_FOUND	(1U << 1)
#define STATUS_REG_SIG_INIT_DONE		(1U << 2)
#define STATUS_REG_SIG_ENTRY_ADDED		(1U << 3)
#define STATUS_REG_MATCH				(1U << 4)

typedef enum
{
	L2BR_CMD_INIT = 0x1,
	L2BR_CMD_ADD = 0x2,
	L2BR_CMD_DELETE = 0x3,
	L2BR_CMD_UPDATE = 0x4,
	L2BR_CMD_SEARCH = 0x5,
	L2BR_CMD_MEM_READ = 0x6,
	L2BR_CMD_MEM_WRITE = 0x7,
	L2BR_CMD_FLUSH = 0x8
} pfe_l2br_table_cmd_t;

#endif /* HW_S32G_PFE_L2BR_TABLE_CSR_H_ */
